Grounded Gate ESD Protection - Modeling and Characterization


The purpose of this paper is to review the Grounded Gate Electrostatic Discharge (ESD) protection scheme, model the two NMOS device breakdowns, evaluate use of the models for design and finally to explore some of issues involved with the use of Grounded Gate NMOS devices as protection devices in modern deep submicron processes. Grounded Gate protection structures are very commonly used to protect integrated circuits during ESD events because of their relative ease of implementation and compactness. If some correlation between models and the devices can be achieved, then it will be possible to reach robust ESD protection schemes with fewer iterations and an overall faster time to market.

Please see attached below.

NMOS_ESD.pdf623.37 KB

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