2006 International Solid State Circuits Conference, San Francisco, CA

in

A 250µW 0.042mm2 2MS/s 9b DAC for Liquid Crystal Display Drivers

I presented this paper at the 2006 ISSCC, it can be found on IEEE eXplore, it is a copyrighted document. The architecture and design methods are presented for implementing N-bit DACs optimized for small-format LCD column drivers. Individual 9b DACs in a 12-channel QVGA display system occupy a die area of 0.042mm2. This represents a composite DAC performance of better than 0.60pJ/b/mm2. (Published paper available upon request)

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